hardware logic
英 [ˈhɑːdweə(r) ˈlɒdʒɪk]
美 [ˈhɑːrdwer ˈlɑːdʒɪk]
网络 硬件逻辑
双语例句
- This processor provides an arithmetic logic unit ( ALU) with a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals.
片内集成有一个具有高度并行性的算术逻辑单元（ALU）、专有硬件逻辑、片内存储器和片内外设等几部分。 - Reconfigurable hardware unit is the kernel element of the reconfigurable computing system, which could be configured into diverse hardware logic to achieve multiple functions and applications.
可重构计算系统的核心是可重构硬件单元，可以通过配置成不同的硬件逻辑来实现多种功能和应用。 - The logical analyzer is quite important in the high speed hardware logic test and the software state analysis. But, at present, the price of table model logic analyzer quite is expensive.
逻辑分析仪在高速硬件逻辑测试和软件状态分析中相当重要，但是目前台式逻辑分析仪的价格比较昂贵，使得它不能普遍应用于教学和科研实践中。 - The Method makes the system developer break away from the limitation of development system and have very strong ability to modify the hardware logic design remotely. It greatly facilitates hardware designing and upgrading and has great value in the application fields.
该方法使系统设计者摆脱了开发系统的局限，提供了很强的远程修改硬件逻辑的能力，极大地方便了硬件的设计与升级，具有很高的应用价值。 - The Article introduces a flexible method that bases on the TCP/ IP protocol and through the network transfers the hardware logic design data generated by the design of FPGA. It configures the FPGA with the CPU and realizes the reconstruction of the hardware logic.
介绍了一种基于TCP／IP协议的在网络上远程传输FPGA设计生成的硬件逻辑数据，并通过CPU对IFPGA进行配置，实现硬件逻辑重构的灵活方法。 - The above work is intended to set up an automatic logic synthesis system to translate a register transfer level language descriptions into hardware logic diagrams.
上述工作是为了建立一个将寄存器传输级语言描述翻译成硬件逻辑图的自动逻辑综合系统。 - The adoption of CPLD chip whose hardware logic can be reprogrammed in system helps to enhance the flexibility of system.
CPLD芯片具有硬件逻辑在系统可编程功能，大大提高了系统设计的灵活性。 - With the gradual improvement of reducing techniques of state space and optimization of model-checking algorithm, model-checking technique has been successfully applied to verify communication protocols and complex hardware logic circuits, and also takes on a wide application prospect in other fields.
模型检测技术已在通信协议和硬件系统的验证等领域得到成功应用，并且随着各种状态空间简化技术和模型检测算法的不断优化，其在其他应用领域也展示出广泛的应用前景。 - Additionally FPGA users can conveniently not only design the hardware logic required, but re-program and re-configure.
而现场可编程门阵列器件（FPGA）是一种可以进行重编程和重配置的芯片，可以方便地设计出所需的硬件逻辑。 - CPLD technology is applied in the design of mouthpiece boards, and the hardware logic is programmed in VHDL language. Thus, the laser processing NC system can update and expand its mouthpiece logic through on-line programming at any time, and achieve high flexibility.
在接口板设计中采用了CPLD技术，利用VHDL语言进行硬件逻辑设计，使该套激光加工数控系统可以通过在线编程的方式随时更新和扩展系统的接口逻辑，实现系统的高度柔性化。 - A concrete design of nonlinear combining feed-forward sequence generator was presented. Cryptographic properties and the hardware logic structure of the generator were studied too.
设计了一种组合前馈序列发生器及其硬件逻辑结构，并分析了它的密码特性。丝光沸石单胞铝原子数与晶胞参数非线性相关； - A systematic method for designing nonlinear combining feed-forward sequence generator is presented in this paper. Cryptographic properties and the hardware logic structure of the generator are studied, too.
提出了一种适合计算机通讯用的序列密码&组合前馈序列密码的设计方法，分析了设计的组合前馈序列发生器的密码特性，设计了它的硬件逻辑结构。 - This paper introduces a new method to control the software segmentation operation with the hardware logic circuit, and disserts the application of "whole cycle accumulation means" and a new thought of "the belt displacement dividing the control cycle".
本文介绍了采用硬件控制软件分段运行的新方法，阐述了整周累积法的重要应用及以皮带行程划分控制周期的新思想。 - Completes hardware logic design of transmission system, and realizes timely, orderly, reliable transmission of underwater acoustic data with pipeline.
依据水下拖缆传输系统的职责，完成了传输系统的硬件逻辑设计，采用流水线的方式实现了水声数据的及时、有序、可靠传输。 - By using FPGA chips as a carrier, applying the EDA development tools, implementing different hardware logic with hardware description language, and connecting with the input and output hardware interface circuits, a comprehensive computer system for the composition principles experiments is completed.
采用FPGA芯片作为载体，使用EDA开发工具，用硬件描述语言实现不同的硬件逻辑，再与硬件的输入输出接口线路相连，最终组成一台可用于组成实验教学的完整计算机系统。 - The design also truncates the Wallace tree for the reduction of hardware logic.
对于华莱士树进行截断处理，有效减少了硬件逻辑。 - A simulation proved that use of a small amount of hardware logic improves the performance of CPU chips substantially.
通过仿真后证明，用少量的硬件逻辑换来了处理器芯片性能的大幅提高。 - However, The use of hardware logic for image collection and implementation of JPEG algorithm is no doubt that has solved the problem of inadequate compression speed which is always troubling the people.
但是，利用硬件逻辑对视频采集及JPEG算法的实现无疑解决了一直困扰人们的压缩速度不足的问题，为图像的传输与处理都提供了方便。 - PLC focus on alternative data logging devices on the distillation of the switching control through simplified procedures PLC software of the original hardware logic circuits.
重点是以PLC替代巡检仪对精馏塔的开关量进行控制，通过PLC软件程序简化了原有的硬件逻辑电路。 - Finally, we handled a simulation testing to the hardware logic design part to achieve a good functional verification.
最后对本文的硬件逻辑设计部分进行了仿真测试，实现了良好的功能验证。 - This paper uses CAN Bus controller which is customized in FPGA, optocoupler and CAN transceiver to implement CAN Bus communication, and describes the hardware logic and device driver of CAN Bus controller in detail.
本文利用在FPGA中定制的CAN总线控制器、片外的光耦以及CAN总线收发器来实现了CAN总线通信，并详细描述了CAN总线控制器的硬件逻辑和驱动程序的设计。 - The technology of System on Programmable Chip is used in the design of the the harmonic detection system. The function of some hardware logic circuit, some software module and Nios ⅱ cpu can be designed in the FPGA.
在此系统的设计中，运用可编程片上系统SOPC的设计理念，即把部分硬件逻辑电路要完成的功能、各软件模块和NiosⅡCPU都集成在单片FPGA上实现。 - Based on the baseband-radio frequency integrated hardware platform, the digital pre-distortion algorithm was realized using of FPGA hardware logic and embedded platform. The main work and innovation points are as follows: 1.
本文对数字预失真的FPGA实现技术进行了讨论和研究，在基带-射频一体化硬件平台上，利用FPGA中硬件逻辑＋嵌入式平台对数字预失真算法进行了实现。 - This technology can be written by VHDL language to implement different hardware logic and can be loaded on FPGA chip in the experiment.
实验由VHDL语言描述不同的硬件逻辑，并加载到FPGA芯片进行实验。 - The architecture of a special embedded device CPU is brought up, which has ordinary computing based on hardware logic units of its own.
这种专用嵌入式设备处理器体系结构除了拥有普通嵌入式处理器的运算与控制功能外，还具备基于自身硬件逻辑单元。 - Constructed by the SOPC Technology PLC system that can effectively use the programmable FPGA hardware logic resources, user-customizable dedicated PLC system, but also has high performance and economy.
通过上述SOPC技术构造PLC系统，可以有效利用FPGA的可编程硬件逻辑资源，便于用户定制专门的PLC系统，同时具有较高的性能和经济性。 - The FPGA co-processor integrates a packet classification engine and management/ scheduling interface implemented in hardware logic, provides very-well packet classification performance and flexibility at the same time.
协处理器将硬件逻辑实现的包分类引擎和管理调度接口集成到一个FPGA上，兼具较高的包分类性能和灵活性。 - Using the FPGA hardware logic resources to implement the image processing algorithms, which includes the pretreatment of mean filtering and color filtering, template matching algorithm, so as to find out the location information of FPC real-timely.
图像处理部分，使用FPGA硬件逻辑资源实现图像处理算法，包括预处理的均值滤波和色彩过滤，以及模板匹配算法，实时找出FPC的位置信息。 - The binary tree computing architecture which contains four multipliers has been optimized through analyzing on the binary tree computing architecture which is realized by hardware logic. And then the computing architecture based multi-core added with co-processing unit is given.
然后对硬件逻辑实现的二叉树运算结构进行了分析，同时对乘法器个数为四的二叉树运算结构进行了优化，给出了多核加协处理单元的运算结构。